Examples of a conventional recording apparatus and a conventional reproducing apparatus are shown in FIGS. 1 and 2. Referring to FIG. 1, the digital video signal to be recorded is compressed and coded by the video encoder 1, and then fed into the video signal buffer 4 in the multiplexing circuit 3. The digital audio signal to be recorded is compressed and coded by the audio encoder 2, and then fed into to the audio signal buffer 5 in the multiplexing circuit 3.
The output terminals of the signal buffers 4 and 5 are connected to the input terminals E1 and E2 of the switching circuit 6, respectively. The output terminal F of the switching circuit 6 is connected to the input terminal of the header addition circuit 7. The output of the header addition circuit 7 is supplied to the digital storage medium (DSM) 10, which includes, for example, a magneto-optical disk or a magnetic disk, e.g., a hard disk. The control circuit 8 receives system clock signals from the multiplexing system clock generation circuit 9, and causes the switching circuit 6 to connect the output terminal F to the input terminals E1 and E2 successively at a predetermined time interval. This successively fetches video signal bytes from the video signal buffer 4 and audio signal bytes from the audio signal buffer 5, thereby time division multiplexing the audio and video signals.
The control circuit 8 causes the switching circuit 6 and the header addition circuit 7 to produce a multiplexed signal having the multiplexing system format set forth in the ISO 11172 (MPEG) standard. The multiplexed signal includes one or more packs (PACK) and one ISO.sub.-- 11172.sub.-- end.sub.-- code, as shown in FIG. 3. The ISO.sub.-- 11172.sub.-- end.sub.-- code is a code of 32 bits and is, when represented in the hexadecimal notation, 0x000001B9. The prefix 0x indicates hexadecimal notation, where x is indeterminate.
Each pack includes a header, which includes a Pack.sub.-- Start.sub.-- Code, a System Clock Reference (SCR), a MUX.sub.-- Rate, and one or more packets (Packet). The Pack.sub.-- Start.sub.-- Code of the header is a code of 32 bits and is 0x 000001B4, the prefix 0x once again indicating hexadecimal notation. A pack has a variable length up to a maximum of 2,048 bytes.
Each packet includes a header, which includes a Packet.sub.-- Start.sub.-- Code.sub.-- Prefix, a stream.sub.-- ID, a Packet.sub.-- length, a Presentation Time Stamp (PTS), a Decoding Time Stamp (DTS), and a packet data portion. The Packet.sub.-- Start.sub.-- Code.sub.-- Prefix is a code of 24 bits and is 0x000001. The Stream.sub.-- ID is a code of 8 bits and indicates the type of the packet, as shown in FIG. 4. The Packet.sub.-- length (16 bits) indicates the length of the packet following it.
The packet data portion of each packet consists of a portion of the digital audio signal (when the stream type indicates an audio stream) or a portion of the video signal (when the stream type indicates a video stream). Further, since each audio stream can have one of 32 different stream.sub.-- IDs and the each video stream can have one of up to 16 different stream.sub.-- IDs, up to 32 different audio signals and up to 16 different video signals can be multiplexed.
A reserved stream includes, for example, subtitle data. Private.sub.-- stream.sub.-- l and private.sub.-- stream.sub.-- 2 do not have defined applications. A padding.sub.-- stream is used to increase the amount of data.
The control circuit 8 (FIG. 1) controls adding headers and reading signal bytes using an algorithm such as that shown, for example, in FIG. 5 so that a total of 2,048 bytes are included in each pack in accordance with the format described above.
Referring to FIGS. 1 and 5, at step S1, the control circuit 8 instructs the header addition circuit 7 to generate a pack header. Then, at step S2, the control circuit 8 waits until the sum of M4 and M5 is equal to or greater than the number of signal bytes D included in one pack. In other words, the control circuit 8 waits until the total number of signal bytes accumulated in the signal buffers 4 and 5 is equal to the number of bytes that can be accommodated by one pack, M4 represents the number of bytes of video signal written in the video signal buffer 4, and M5 represents the number of bytes of audio signal written in the audio signal buffer 5. D represents a total number of signal bytes that can be accommodated in one pack. To simplify the description, it will be assumed that D is a constant obtained by subtracting the number of bytes in the pack headers, the number of bytes in the video packet headers, and the number of bytes in the audio packet headers, from the number of bytes (2,048) in a pack.
In step S3, the number of bytes P1 of video signal that will be accommodated in the pack and the number of bytes P2 of audio signal that will be accommodated in the pack are calculated using the following equations: EQU P1=D.times.M4/(M4+M5) EQU P2=D-P1
Thus, P and P2 are calculated by distributing the total number of signal bytes D accommodated by the pack according to the ratio of numbers of bytes M4 and M5 accumulated in the signal buffers 4 and 5.
At step S4, after the numbers of signal bytes are determined, the control circuit 8 instructs the header addition circuit 7 to generate a video packet header, and to feed the video packet header to the DSM 10. Then, at step S5, the control circuit 8 transfers P1 bytes of video signal from the video signal buffer 4 to the DSM 10. At step S6, the control circuit 8 causes the header addition circuit to generate an audio packet header, and to feed it to the DSM 10. At step S7, the control circuit 8 transfers P2 bytes of audio signal from the signal buffer 5 to the DSM 10. The DSM 10 records the multiplexed signal received from the multiplexing circuit 3. At step S8, the control circuit tests whether all the video signal and all of the audio signal have been multiplexed. If the result is NO, execution returns to step S1. If the result is YES, execution proceeds to step S9, at which step the program ends.
The multiplexed signal recorded on the DSM 10 in this manner is reproduced and decoded by the reproducing apparatus shown in FIG. 2. In FIG. 2, the header separation circuit 22 in the separation circuit 21 separates pack headers and packet headers from the multiplexed signal read out from the DSM 10. The header separation circuit 22 supplies the headers to the control circuit 24, and supplies the multiplexed signal to the input terminal G of the switching circuit 23. The output terminals H1 and H2 of the switching circuit 23 are connected to the input terminals of the video decoder 25 and the audio decoder 26, respectively. The control circuit 24 in the separation circuit 21 successively connects the input terminal G of the switching circuit 23 to the output terminals HI and H2 in accordance with the stream.sub.-- ID of the packet header received from the header separation circuit 22. In this way, the audio signal and the video signal are demultiplexed from the time-division multiplexed signal, and are supplied to the corresponding decoder.
When the video signal fed into the multiplexing circuit 3 is compressed in accordance with the MPEG coding standard, this imposes limitations on performing random access or searching operations. A video signal that is compressed according to the MPEG standard includes intra-picture coded pictures, I (intra) pictures, and two types of inter-picture coded pictures: P (forward predictive) pictures and B (bidirectional predictive) pictures. Of the three types of pictures, only I-pictures are compressed independently of other pictures, and can therefore be said to be intrinsically expandable. To decode the video signal of an I-picture requires only the video signal of the I-picture itself, and does not require the video signals of other pictures. However, because of this, the coding efficiency of I-pictures is low. Since P-pictures and B-pictures are obtained by decoding difference signals from preceding and/or following reference pictures, the compression efficiency of such pictures is high. However, decoding a P-picture or a B-picture requires that the video signal of a reference picture preceding or following the picture be decoded in addition to the video signal of the picture. Consequently, during a search, only about two I-pictures are normally reproduced each second. This provides a random access facility while retaining an acceptable average compression efficiency.
FIG. 6 shows a diagram of a digital video signal including I-pictures, P-pictures, and B-pictures as it is recorded on the DSM 10. The digital video signal is divided into more than one Groups of Pictures (GOPs). Each GOP begins with an I-picture. When the video signal is compressed at a fixed rate, since an I-picture periodically appears at a predetermined location, the location can be determined by calculation and the I-picture accessed. However, when the video signal is compressed at a variable rate, the location of the I-pictures is indeterminate, and it is thus difficult to access the I-pictures.
When a search command is received by the reproducing apparatus shown in FIG. 2, a main control apparatus (not shown) delivers to the control circuit 24, the video decoder 25, and the audio decoder 26, an instruction to transition to search mode. In search mode, the video decoder 5 decodes only the I-pictures in the video signal received from the switching circuit 23. Alternatively, only video signals representing I-pictures are selected by the separation circuit 21 and fed into the video decoder 25. The video decoder 25 then decodes the video signals that it receives.
In search mode, the control circuit 24 commands the DSM 10 to move the read position on the disk forwards or backwards. The amount of movement of the read position depends upon the search rate, the compression ratio, etc.; generally, the amount of movement increases as the rate of the search increases and as the compression ratio increases. When the read position has moved to the selected location, the multiplexed signal is read from the DSM 10 and fed into the separation circuit 21. The header separation circuit 22 and the demultiplexer 23 separate the video signal and supply it to the video decoder 25. The video decoder 65 decodes the I-picture that appears first, and feeds it to the video output. The audio decoder 66 is muted in search mode.
In the manner just described, a search operation that successively reproduces I-pictures is performed by carrying out repeated random accesses. Thus, when, for example, the user commands a high-speed forward search, the video decoder 25 searches for an I-picture by skipping a predetermined number of frames of the video signal it receives, and then decodes and feeds out each resulting I-picture. Alternatively, the DSM 10 can search for I-pictures, and only reproduce video signals of I-pictures for decoding by the video decoder 25. A search operation involving a successive reproduction of I-pictures is carried out by repeating such operations.
A different example of a conventional recording apparatus and a different example of a conventional reproducing apparatus are shown in FIGS. 7 and 8, respectively. Referring to FIG. 7, the digital video signal to be recorded is fed into the video encoder 1, and the digital audio signal to be recorded is fed into the audio encoder 2. The outputs of the video encoder 1 and the audio encoder 2 are fed into the multiplexing circuit 3. The output terminal of the multiplexing circuit 3 is connected to the DSM 10, where the resulting multiplexed signal is stored for a first time.
The multiplexed signal read out of the DSM 10 is fed to the Table of Contents (TOC) addition circuit 50, which adds a TOC to the beginning of the multiplexed signal. Generation of the TOC will be described in detail below. The output of the TOC addition circuit 50 is fed to the input terminal of the sector header addition circuit 51. The output of the sector header addition circuit 51 is fed to the Error Correction Coding (ECC) encoder 52. The output of the ECC encoder 52 is fed to the modulation circuit 53, which feeds the resulting recording signal to the cutting machine 54, which cuts the optical disk master 60. Plural optical disks for distribution to consumer or professional users, such as the optical disk 60A shown in FIG. 8, are manufactured using the optical disk master 60.
The input terminal of the entry point storage device 33A is connected to the output terminal of the video encoder 1, or to the video entry point detection circuit 31, so that it receives and stores entry point information from either one of them. The output of the entry point storage device 33A is fed to the TOC generation circuit 56, which arranges the format of the TOC. The TOC is fed to the TOC addition circuit 50, which adds the TOC to the beginning of the multiplexed signal, as described above.
The video signal to be recorded is compressed and coded by the video encoder 1, and then fed to the multiplexing circuit 3. The audio signal to be recorded is compressed and coded by the audio encoder 2, and then fed to the multiplexing circuit 3. The multiplexing circuit 3 multiplexes the coded video signal and the coded audio signal it receives using time-division multiplexing. The multiplexed signal is fed into the DSM 10, which stores it. This process is continued until all of the video signal and all of the audio signal have been recorded on the DSM 10.
An output of the video encoder 1 is connected to the entry point storage device 33A. When the video encoder 1 is capable of providing an entry point generation signal, it provides an entry point generation signal when it generates an I-picture. The entry point storage device 33A receives from the video decoder 1, and stores, the entry point generation signal generated each time the video encoder generates an I-picture.
An output of the video encoder 1 is also connected to the input terminal of the video entry point detection circuit 31. When the video encoder 1 is incapable of providing an entry point generation signal, or when the digital video signal to be recorded is already encoded, the video entry point detection circuit 31 either generates an entry point generation signal each time an I-picture is generated, or detects the entry points in the video signal it receives from the video encoder 1, and provides an entry point generation signal in response. The entry point storage device 33A receives from the video entry point detection circuit 31, and stores, an entry point generation signal each time an entry point is detected.
After the video signal and the audio signal have been coded and multiplexed, the resulting multiplexed signal is written in the DSM 10. Simultaneously, the entry points required to construct a TOC are all stored in the entry point data storage device 33A. Then, processing for adding the TOC is started.
First, the required entry points are fed from the entry point storage device 33A to the TOC generation circuit 56. A selection is then made by the user or a controller (not shown). The entry points fed to the TOC generation circuit 56 are arranged in the format shown in FIG. 9. In this example, the TOC includes the positions of N entry points. Each entry point is indicated by a sector address of 4 bytes.
Returning to FIG. 7, the TOC generated by the TOC generation circuit 50 is delivered to the TOC addition circuit 50, whence it is fed to the sector header addition circuit 51 ahead of the multiplexed signal stored in the DSM 10. Then, following the TOC, the multiplexed signal passes from the DSM 10, through the TOC addition circuit 50, to the sector header addition circuit 51.
As shown in FIG. 10, each sector has a sector header of 16 bytes, and accommodates 2,048 bytes. The sector header includes the sector number of the sector. The sector header addition circuit 51 divides multiplexed signal received from the TOC addition circuit 50 into blocks of 2,048 bytes, and adds a sector header of 16 bytes that includes the sector number. The output of the sector header addition circuit 51 is fed into the error correction coding (ECC) encoder 52.
The ECC encoder 52 adds a prescribed amount of parity data to the multiplexed signal received from the sector header addition circuit 51, and feeds the resulting signal to the modulation circuit 53. The recording signal from the modulation circuit 53 is fed to the cutting machine 54, which writes the recording signal onto the optical disk master 60.
In the reproducing apparatus shown in FIG. 8, the signal recorded on the optical disk 60A is reproduced by the pickup 61. The output signal from the pickup 61 is fed into the demodulation circuit 62, which demodulates the signal from the pickup 61, and feeds the demodulated signal into the ECC circuit 63. The ECC circuit 63 detects and corrects errors in the demodulated signal, and feeds the resulting multiplexed signal into the demultiplexer circuit 64.
The video signal 66 demultiplexed by the demultiplexer circuit 64 is fed into the video decoder 65, while the audio signal is fed from the demultiplexer circuit to the audio decoder 66. The video decoder 65 and the audio decoder 66 individually reverse the compression of the compressed signals to provide uncompressed video and audio output signals, respectively.
In response to an instruction from the user (not shown) to reproduce the signal recorded on the disc, the controller 67 sends a command to the video decoder 65 and the audio decoder 66, and provides an access command to the drive control circuit 69. The drive control circuit 69 drives the pickup 61 using the tracking servo circuit 70 in accordance with the command from the controller 67 to begin reproducing from the disc.
The TOC at the beginning of the signal recorded on the disk is separated by the demultiplexer circuit 64, fed to the controller 67, and stored in the TOC storage device 68. The TOC is read out from the TOC storage device 68 when necessary, to be used by the controller 67.
Operation of the conventional disk reproducing apparatus shown in FIG. 8 will now be described. When the optical disk 60A is inserted, the controller 67 delivers a first sector reading command to the drive control circuit 69. The drive control circuit 69 drives the pickup 61 by way of the tracking servo circuit 70 to start reproducing from the first sector on the disk 60A.
The pickup 61 illuminates the optical disk 60A with a laser beam, and reproduces the signal recorded on the optical disk 60A using reflected light from the disk. The signal from the pickup 61 is fed to, and is demodulated by, the demodulation circuit 62. The demodulated signal is fed to the ECC circuit 63, where error detection and correction are performed. The resulting multiplexed signal from the ECC circuit is fed to the demultiplexer circuit 64.
The TOC is recorded in first sector of the disk. The TOC is demultiplexed by the demultiplexer circuit 64 and is fed to the controller 67. The controller 67 stores the TOC in the TOC storage device 68, and displays the TOC to the user (not shown) on a display (not shown).
In response to an instruction from the user (not shown) to reproduce an item selected from the TOC, the controller 67 delivers a command to the drive control circuit 69 to start operation. The drive control circuit 69 drives the pickup 61 by way of the tracking circuit 70 to start reproducing at the read position on the disk 60A indicated by the user's selection from the TOC. The drive control circuit 69 also simultaneously delivers a command to the video decoder 65 and to the audio decoder 66 to prepare to decode the signals reproduced from the disk.
Simultaneously with reading the TOC, the pickup 61 illuminates the optical disk 60A with a laser beam, and reproduces the signal recorded on the disk using reflected light from the disk. The signal from the pickup 61 is fed to, and is demodulated by, the demodulation circuit 62. The demodulated signal is fed to the ECC circuit 63, where error detection and correction are performed. The resulting multiplexed signal is fed into the demultiplexer circuit 64.
The video signal demultiplexed by the demultiplexer circuit 64 is fed to the video decoder 65, while the audio signal demultiplexed by the demultiplexer circuit is fed to the audio decoder 66. The video signal and the audio signal, which are compressed, are expanded by the video decoder 65 and the audio decoder 66, respectively, to provide an uncompressed digital video signal and an uncompressed digital audio signal.
When the video signal fed into the multiplexer 3 is compressed in accordance with the MPEG coding standard, this imposes a limitation on performing random access or searching operations. In particular, as described above, a video signal compressed according to the MPEG standard includes intra-picture coded pictures, I (intra) pictures, and two types of inter-picture coded pictures: P (forward predictive) pictures and B (bidirectional predictive) pictures. Of the three types of pictures, only I-pictures are coded independently of other pictures. To decode the video signal of an I-picture requires only the video signal of the I-picture itself, and does not require video signals relating to other pictures. Hence, an I-picture picture can be decoded by itself. However, because of this, the compression efficiency of I-pictures is low. Since P-pictures and B-pictures are obtained by decoding difference signals from preceding and/or following reference pictures, the compression efficiency of such pictures is high. However, to decode a P-picture or a B-picture requires that the video signal of a reference picture preceding or following the picture be decoded in addition to the video signal of the picture. Consequently, during a search, only about two I-pictures are normally reproduced each second. This provides a a random access facility while retaining an acceptable average compression efficiency.
The digital video signal including I-pictures, P-pictures and B-pictures recorded on the optical disk 60A is divided into more than one Groups of Pictures (GOPs) as described above with reference to FIG. 6. As described above, each GOP begins with an I-picture. When the video signal is compressed at a fixed rate, since an I-picture periodically appears at a predetermined location, the location can be determined by calculation and the I-picture accessed. However, when the video signal is compressed at a variable rate, the location of the I-pictures is indeterminate, and it is thus difficult to access the I-pictures.
In particular, when a search command is received by the disk reproducing apparatus shown in FIG. 8, the controller 67 delivers to the drive control circuit 69, the video decoder 65, and the audio decoder 66, an instruction to transition to search mode. In search mode, the video decoder 66 decodes only the I-pictures in the video signal it receives. Alternatively, only video signals representing I-pictures are selected and fed by the demultiplexer circuit 64 to the video decoder 65. The video decoder 65 then decodes the video signals that it receives.
In search mode, the drive control circuit 69 commands the tracking servo circuit 70 to move the read position on the disk forwards or backwards. The amount of movement of the read position then depends upon the search rate, the compression ratio, etc.; generally, the amount of movement increases as the rate of the search increases, and as the compression ratio increases. When the read position has moved to the selected location, the signal from the pickup 21 is fed to the demultiplexer circuit 64 via the demodulation circuit 62, and the ECC circuit 63. The demultiplexer circuit 64 demultiplexes the video signal and supplies it to the video decoder 65. The video decoder 65 decodes the I-picture that appears first, and feeds it to the video output. The audio decoder 66 is muted in search mode.
In the manner just described, a search operation that successively reproduces I-pictures is performed by carrying out repeated random accesses. Thus, when, for example, the user commands a high-speed forward search, the video decoder 25 searches for an I-picture by skipping a predetermined number of frames of the video signal it receives, and then decodes and feeds to the output each resulting I-picture. Alternatively, in response to an instruction from the controller 67, the drive control circuit 69 can drive the tracking servo circuit 70 to search for I-pictures, and only the video signals of I-pictures are supplied to, and decoded by, the video decoder 65. A search operation involving a successive reproduction of I-pictures is carried out by repeating such operations.